FROM THE EDITOR
This week we talk with Wally
Rhines, CEO of Mentor Graphics. Under Rhines’s leadership,
Mentor Graphics is the only major EDA vendor to maintain a major,
sustained investment in FPGA tools over the past decade. In our
feature article, we take a closer look at the ideas behind that
strategy, and the man behind the ideas.
We also have a
contributed article from University of Southern California on design
techniques for low-power FPGA applications. Take a look and see
where you may be burning more power than you really need
to.
We also are happy to announce that we’ve teamed with
Demos on Demand to add a new section to our site. Come in, register,
and browse
streaming demos from a number of leading FPGA and EDA
vendors.
Finally, we have a number of new postings pouring
into our new Journal Jobs employment pages. If you’re looking for a
special career opportunity in programmable logic, come browse
the latest listings.
Thanks for reading! If
there's anything we can do to make our publications more useful to
you, please let us know at: comments@fpgajournal.com
Kevin
Morris – Editor FPGA and Programmable Logic
Journal |
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LATEST NEWS
October 19, 2004
Aldec
Releases Active-HDL 6.3 with Integrated SystemC™
Co-Simulation
Altera's
Cyclone FPGA Family Crosses 5 Million-Unit Mark
HyWire
Ltd. Introduces Classification Engine Architecture For Security and
QoS Applications
October 18, 2004
Xilinx
Introduces Next-Generation EasyPath FPGAs Priced Below Structured
ASICs
New
Line of Automotive Devices Strengthens Xilinx Leadership Position
Altera
to Demonstrate Groundbreaking FPGA-Based Graphics Control Technology
at Convergence 2004
True
Circuits Invites ASIC, FPGA & SoC Designers to the ARM
Developers' Conference to Learn More About Using Hard Timing Macros
in ARM Cores
HyperTransport
Consortium Announces Suite of HyperTransport 2.0 Devices from AMD,
Agilent, Dolphin, FuturePlus, GDA, SiS, ULi, and VIA
Coreco
Imaging Introduces X64-CL iPro Image Acquisition Board
IDT
Introduces Industry's First Three-Port SPI-4 Packet-Exchange Devices
D2
Technologies Debuts vPort...the VoIP Software Solution for the
Non-DSP SOC; Developer's Kit is Available for the Software
Anadigm®
New Field Programmable Analog Arrays Double Processing Capability,
Feature Aggressive Pricing
Lattice
Lead-Free Product Shipments Top 5 Million Devices
October 17, 2004
Altera
Opens Sales Office in Osaka, Japan
October 15, 2004
HDL
Works Presents HDL Companion 1.1
True
Circuits Invites ASIC, FPGA & SoC Designers to the ARM
Developers' Conference to Learn More About Using Hard Timing Macros
in ARM Cores
Anadigm
Demos Software-Controlled, Programmable Analog Audio Solutions at
AES Convention
Chronology
Releases TimingDesigner Version 7.0
October 14, 2004
Toshiba,
Xilinx Announce Strategic Foundry Relationship, Reach 90nm/300mm
Manufacturing Milestone
Industry's
Premier Event Dedicated To The Global Advancement Of Software
Defined Radio Is Set For November In Phoenix
October 12, 2004
Sundance
Releases a New Foundation for its Communication and Interconnect
Products
October 7, 2004
Sundance
Unveils its Flagship Data Acquisition Module for Digital Signal
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Wally Rhines Leading Mentor
Down the Path Less Traveled
Wally Rhines doesn’t follow the crowd. He’s made a career
of betting on the dark horse and tackling the unpopular assignment. As the
semiconductor industry’s version of Warren Buffet, Rhines has consistently
picked the out-of-favor or under-performing business with big turnaround
potential. When Wally took his position as CEO of Mentor Graphics in 1993,
he was assuming the helm of a ship that many believed was sinking fast.
Mentor had launched its epic “Falcon Framework” with great fanfare, only
to be besieged by unhappy customers in a market that was moving fast away
from frameworks and toward point tool design methodologies. This was not a
new situation to Rhines, however. He had previously engineered a
turnaround in TI’s ASIC and microprocessor group, converting it from dog
to darling by refocusing on the rapidly emerging digital signal processing
(DSP) business.
One is immediately put at ease by Wally’s warm, engaging
style. During his decade at Mentor, he’s made a practice of listening -
listening to anyone at the company that wanted to talk to him, keeping the
door open, and maintaining an approachability that few CEOs manage. The
result is that he more often hears the truth about an issue, rather than
an overspun version distilled for executive consumption. In the hallways
at Mentor he is known as just “Wally,” and he is liked and respected
throughout the company.
Wally’s interest in computers began in high school where
he worked as a night operator on IBM 709 and 1401 systems during his
senior year. He took computer classes at the University of Michigan while
studying chemical engineering, finally leaving with an undergraduate
degree in metallurgical engineering. He then went on to graduate studies
at Stanford where he began to refine his practice of contrarian
philosophy. “I tended to do things other people didn’t do,” Rhines says.
“I did the first electronics-related thesis there. Craig Barrett (Intel
CEO) was one of my faculty advisors.” Rhines was particularly interested
in Gallium Arsenide as a material for semiconductors and did research on
that topic in graduate school. [more]
Energy Efficient Application Design using FPGAs
by Sumit Mohanty and Viktor K. Prasanna, University
of Southern California
Traditionally, FPGAs are not considered suitable for
low-power application design because of higher quiescent power,
significant energy dissipation during start-up, and higher dynamic power
due to longer interconnects and overheads for reconfigurability. However,
with advances in FPGA manufacturing technologies and growing demand for
feature-rich mobile applications in both civilian and military communities
FPGAs are being considered an attractive device for applications deployed
in power-constrained environments. Some of the reasons for considering
FPGA for energy efficient application design are:
-- In general, FPGAs are
denser, use lower supply voltage, and provide more computation per Watt
than the previous generation of devices. Contrary to the concern, the
latest 90 nm devices from both Xilinx and Altera are more power efficient.
According to a previous
article, the Xilinx Virtex 4 is more than 50% more power efficient
than their previous generations;
-- Non-volatile Flash based configuration
memory available in some FPGAs (e.g. Actel ProASIC PLUS) allows rapid and
power efficient startup;
-- Partial reconfiguration enables use of
a smaller number of FPGAs and dynamic reconfiguration for low-power design
(e.g. Xilinx Virtex-II series); [more]
ANNOUNCEMENTS
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